An Improved Algorithm for the VLSI Implementation of Type II Generalized DHT that Allows an Efficient Incorporation of Obfuscation Technique

An Improved Algorithm for the VLSI Implementation of Type II Generalized DHT that Allows an Efficient Incorporation of Obfuscation Technique

연구 분야: Analysis

학회: 2022 45th International Conference on Telecommunications and Signal Processing (TSP)

This paper proposes a new VLSI algorithm for a prime length type II generalized discrete Hartley transform (DHT) that allows a high speed VLSI implementation and an efficient incorporation of the obfuscation technique with low overheads. The proposed algorithm is highly regular and modular, presents a low computational complexity, a high throughput and it can be efficiently mapped on linear systolic arrays. Using the obfuscation method, it presents the additional advantage of the hardware security. The proposed VLSI algorithm uses some regular and modular computational structures called quasi-band correlations and can be efficiently implemented on a VLSI chip using the systolic arrays architectural paradigm.