연구 분야: Analysis
학회: ASPDAC '25: Proceedings of the 30th Asia and South Pacific Design Automation Conference
Reverse engineering the functional specification from a netlist is a challenging task that enables IP piracy and tampering. Traditional logic locking techniques, which depend on external activation with secrets stored in tamper-proof locations to thwart reverse engineering, have repeatedly been compromised by key recovery attacks. Their vulnerability highlights the flawed assumption of relying on tamper-proof secrets for building hardware security solutions, especially when activated devices are deployed in open environments where they are exposed to attackers for functional queries and probing. This paper presents white-box logic obfuscation (WBLO) as a novel solution to safeguard control logic from functional reverse engineering, even when attackers have full visibility of the operational netlist. WBLO eliminates the need for post-manufacturing activation and reliance on tamper-proof key storage by securing the design with keys that are autonomously updated internally through the legitimate sequential execution of the device. The proposed approach invalidates functional analysis under arbitrary probing and combinational queries. We examine the implementation challenges inherent in the WBLO process and identify critical design considerations that enhance security and efficiency. Building on these insights, we suggest a prioritization for various design transformation and synthesis rules that achieve robust security in the white-box attack model while minimizing implementation overheads.
| 발행 연도 | 2025년 |
|---|---|
| 인용수 | 0 |
| 출판 국가 | Andorra |
| 사이트 | ACM |
| 좋아요 수 | 0 |