Virtual Platform Acceleration through Userspace Host Execution

Virtual Platform Acceleration through Userspace Host Execution

연구 분야: Verification

학회: 2022 IEEE 35th International System-on-Chip Conference (SOCC)

Today’s complex HW/SW systems require functional verification of the target software as early as possible. Full system simulators, so-called Virtual Platforms (VPs), are the standard tools for this. However, increasing complexity of simulation targets has led to simulation performance issues. When already using state-of-the-art simulation infrastructure, simulation speed can be improved through host execution. Here, parts of the target software are executed natively on the simulation host.In this work, a novel approach to host execution is proposed. We argue that only hardware-dependent components of the target software should be executed on the VP, such as operating system kernels, hypervisors, trusted execution environments and device drivers. Only these components require the amount of detail offered by the VP. Test stimuli for these components are provided by higher level user space software that should be executed on the host for improved performance. By dividing the target software into these parts, average speedups of 2x are demonstrated in our case study.