Hardware Security of Image Processing Cores Against IP Piracy Using PSO-Based HLS-Driven Multi-Stage Encryption Fused with Fingerprint Signature

Hardware Security of Image Processing Cores Against IP Piracy Using PSO-Based HLS-Driven Multi-Stage Encryption Fused with Fingerprint Signature

연구 분야: Verification

학회: SN Computer Science

The increasing usage of image processing applications in modern technological environments is driven by their ability to enhance visual quality in diverse applications, from social media to medical imaging. The design of these cores as dedicated application-specific hardware intellectual property (IP) must ensure optimized performance and security. It is crucial to optimize these designs while enhancing their security to create a robust, secure design flow that can provide security against hardware security threats like IP piracy and fraudulent ownership claim. The proposed methodology introduces a low-cost security framework for application-specific hardware systems using an HLS-aided fusion watermarking framework and particle swarm optimization-driven design space exploration (PSO-DSE) process. The proposed approach demonstrates the generation of a multi-stage encryption-based signature along with the IP seller’s fingerprint biometric-based signature, which is further fused to generate the final watermark signature. It allows the embedding of a greater number of secret watermark constraints offering lower probability of coincidence and higher tamper tolerance without incurring design overhead, compared to prior works.