An investigation of software describing methods to design dual background scrolling hardware in high-level synthesis

An investigation of software describing methods to design dual background scrolling hardware in high-level synthesis

연구 분야: Verification

학회: Artificial Life and Robotics

We are developing a game programing library which can be converted to hardware modules by high-level synthesis, HLS technology to realize high-performance and low-power mobile terminals executing game applications. High-level synthesis is a technology that converts software into hardware automatically. The game software is executed by high-speed and low-power hardware on the reconfigurable devices in the mobile terminals instead of power-hungry software execution. To make high-level synthesis tool generate desirable hardware module, we must describe software program well considering the hardware organization. In this paper, we developed two software description methods for dual background scrolling processing as one of functions in high-level synthesis-oriented game software library. We also evaluate the execution time, resource usage, and power consumption of hardware modules that high-level synthesis generated through the experiments and investigate which hardware module has better performance.