A Safety-Critical, RISC-V SoC Integrated and ASIC-Ready Classic McEliece Accelerator

A Safety-Critical, RISC-V SoC Integrated and ASIC-Ready Classic McEliece Accelerator

연구 분야: Verification

학회: International Symposium on Applied Reconfigurable Computing

Security is an integral part of ensuring the integrity of safety-critical systems. Safety-critical systems with extremely long-lifespan, such as the ones employed in the space and automotive industry, need additional security measures that can guarantee the thwarting of both current and future attacks. In that respect, the future advent of large-scale quantum computers, could potentially compromise the security of such systems leading to catastrophic consequences. To this end, in this paper we present the integration of the post-quantum cryptosystem of Classic McEliece (CM) in an open-source platform for high-performance safety-critical systems (SELENE). The SELENE project proposed a new family of safety-critical computing platforms, which builds upon open source components such as the RISC-V instruction set architecture, GNU/Linux, and the Jailhouse hypervisor. This work capitalizes on the modularity of the SELENE hardware platform and proposes a high-performance and constant-time HLS-based accelerator of the encoding and decoding subroutines of CM. We specifically present the first integration of a CM accelerator in a Linux-capable and RISC-V based System-on-Chip (SoC). Our experiments show significant speedups of up to 4.9\(\mathbf {\times }\) and 198\(\mathbf {\times }\) compared to a scalar software implementation of CM encoding and decoding subroutines respectively, executed on an x86 core. We additionally showcase a successful implementation of our accelerator in an ASIC context using the Global Foundries 22 nm technology node operating at \(\mathbf {>1}\) GHz frequency.