연구 분야: Cryptography
학회: Cluster Computing
The rapid integration of IoT devices has ushered in unparalleled convenience and efficiency. However, ensuring secure communication and authenticity amidst constraints such as limited resources, heterogeneous configurations, and energy efficiency remains a formidable challenge. Physical Unclonable Functions (PUFs) offer a solution by establishing unique, device-specific identities through manufacturing process variations devoid of additional resource requirements. Challenge-response pairs (CRPs) are generated to authenticate IoT devices based on device-specific traits. Yet, PUF-generated CRPs often demonstrate susceptibility to modeling attacks due to high correlation. Despite complex PUF architectures, such as XOR PUF and Interpose PUF (iPUF), advances in machine learning (ML) techniques enable modeling attacks on PUFs. This work proposes a step towards more secure and resource-conscious PUF designs by introducing a novel 64-bit Arbiter-Skip Dynamic PUF (DPUF). This design integrates reliable noise into the delay-based arbiter PUF, creating a dynamic element that thwarts predictability. We conduct a detailed performance evaluation, comparing the effectiveness of logistic regression and multilayer perceptron-based modeling attacks on three PUF architectures: Arbiter PUF, XOR PUF, and the proposed DPUF. The experimental findings indicate that the proposed dynamic PUF exhibits better resilience against machine learning-based attacks while concurrently demonstrating efficient resource utilization. The contribution of the DPUF is a step towards more secure and resource-conscious PUF designs. The experimental results emphasize the potential suitability of the proposed dynamic PUF for integrating IoT applications, thereby contributing to enhanced security in these environments.
| 발행 연도 | 2024년 |
|---|---|
| 인용수 | 0 |
| 출판 국가 | Andorra |
| 사이트 | Springer |
| 좋아요 수 | 0 |