연구 분야: Cryptography
학회: DAC '23: Proceedings of the 60th Annual ACM/IEEE Design Automation Conference
Learning parity with noise (LPN) is under intensive research in building advanced cryptography suites and protocols. However, in LPN-based cryptography, the transmission of the large matrices between the memory and the processor units generally incurs a significant latency overhead. In this work, we propose PIMA-LPN, a processing-in-memory (PIM) accelerator for LPN cryptography. Specifically, our PIM architecture can carry out the entire computations of LPN in memory. In this experiment, we demonstrate that PIMA-LPN can be 20.86× ~ 216.8× faster than existing CPU and FPGA implementations of LPN cryptography. Furthermore, we show that using PIMA-LPN, LPN cryptography can achieve similar computational efficiency compared to the post-quantum cryptography standard (i.e., CRYSTALS-Kyber) with 15.4x fewer memory units.
| 발행 연도 | 2025년 |
|---|---|
| 인용수 | 0 |
| 출판 국가 | China |
| 사이트 | ACM |
| 좋아요 수 | 0 |