연구 분야: Cryptography
학회: 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Supersingular isogeny key encapsulation (SIKE) protocol is a promising candidate for the standard of post quantum cryptography (PQC), but it suffers from high computational complexity. Since the modular multiplication takes up a large proportion of the computations in SIKE protocol, accelerating this operation can efficiently speed up the entire protocol. In this paper, we propose a new modular multiplication algorithm, which can achieve lower complexity than prior arts. The SIKE-friendly prime with form of p = 2nxlny B +1 = Rn +1 is considered. The modulo-p operation is mainly replaced by n modulo-R operations, for which a general Barrett reduction( GBR) algorithm is presented and applied. Moreover, an efficient architecture is designed for the proposed algorithm, where the pipelining and interleaved techniques are applied. For the multiply-accumulate (MAC) part, various optimization techniques are introduced to reduce the data path and the complexity. The FPGA implementation results show that for a level-5 quantum-security parameter, our design achieves the fastest clock speed with middle number of clock cycles and small resources consumption among the state-of-the-art works.
| 발행 연도 | 2020년 |
|---|---|
| 인용수 | 5 |
| 출판 국가 | Andorra |
| 사이트 | IEEE |
| 좋아요 수 | 0 |