A High-Throughput and Compact GOST-28147-89 Accelerator for RISC-V System-on-Chip

A High-Throughput and Compact GOST-28147-89 Accelerator for RISC-V System-on-Chip

연구 분야: Cryptography

학회: 2023 15th International Conference on Knowledge and Systems Engineering (KSE)

Taking advantage of the royalty-free, open-source RISC-V Instruction Set Architecture (ISA), various RISC-V System-on-Chip (SoC) designs have been proposed to be applied in securing customized embedded applications. In this work, we propose a high-throughput and compact GOST-28147-89 block cipher accelerator that is suitable for integrating into these RISC-V SoC designs. The GOST-28147-89 block cipher accelerator is capable of operating at the maximum frequency of 251.32 MHz, yielding a high throughput of 487.4 Mbps. Meanwhile, the hardware utilization of the proposed GOST-28147-89 accelerator is extremely small at 273 Slice Look-up-Tables (LUTs) and 138 Slice Registers, which is 0.27% and 0.07% of available Slice LUTs and Slice Registers in a Xilinx Kintex-7 XC7K160T FPGA device, respectively. When attached to the Berkeley's-Rocket-processor-based RISC-V SoC, the proposed accelerator improves the GOST-28147-89 cryptographic operations by 20.43 folds.