연구 분야: Cryptography
학회: CSI Transactions on ICT
Companies having high-end Information and Communication Technology (ICT) invest a great deal of money to safeguard their valuable information. Without adequate cyber-security, ICT-based organizations cannot survive in today’s cyber world, where a vast amount of information is stored digitally. An insider attack for an ICT is the most unpredictable and challenging to anticipate compared to other possible attacks. This article describes a multi-core cryptosystem consisting of homogeneous cryptoprocessors to prevent insider attacks. The proposed technique aims to defend against a specific type of insider attack. We consider an attacker, who may be an insider or an outsider, planted a Trojan or information-stealing device. The protection consists of two distinct layers. For the first security layer, the designed cryptosystem has four RSA cores. A scheduler randomly selects each of the cores. Each of the four RSA cores has a unique internal mechanism for calculating the Modular Exponentiation required for cryptographic transformations. Using the inbuilt confusion mechanism of Bit Forwarding techniques, the crypto-algorithmic method of avoiding side-channel attacks provides the second security layer. The cryptosystem is implemented in hardware using Verilog; Vivado 22.1 is used for FPGA implementation, and the same is subjected to testing against various attacks.
| 발행 연도 | 2024년 |
|---|---|
| 인용수 | 0 |
| 출판 국가 | India |
| 사이트 | Springer |
| 좋아요 수 | 0 |