LISA: A Multi-Layered Iterative Framework for Hardening Obfuscation with Modular Unit Transformations


연구 분야: Analysis



학회: GLSVLSI '24: Proceedings of the Great Lakes Symposium on VLSI 2024


초록

Securing intellectual property (IP) in hardware has become increasingly crucial amid increasing threats from adversaries due to untrusted entities in the integrated circuit (IC) supply chain. Hardware obfuscation techniques like logic locking and state-space transformation have emerged as potent countermeasures against such threats, but doubts about their efficacy persist due to compromises in recent years. Furthermore, existing countermeasures also tend to address specific adversarial threat models. This paper introduces LISA, a multi-layered framework that uses iterative unit transformations to address security concerns in hardware obfuscation at minimal overhead costs. The proposed framework employs a security-metric-guided analysis of obfuscated IPs, subjecting them to various attacks to uncover vulnerabilities. Once identified, LISA implements unit transformations that harden the obfuscation against these vulnerabilities. Compared to prior work, the layered iterative framework employed can thwart current and emerging threats by acquiring novel adaptive design transformations to minimize overhead incurred at each iteration. The proposed methodology is implemented using commercial EDA tools and evaluated on open-source ISCAS85 and MIT-CEP benchmarks, demonstrating promising attack resilience with low overheads.


Author Profile
Rasheed Almawzan

Electrical and Computer Engineering University of Florida USA

Andorra
Author Profile
Atri Chatterjee

University of Florida USA

United States
Author Profile
Aritra Dasgupta

University of Florida USA

United States

📄 논문 정보

발행 연도 2024년
인용수 0
출판 국가 Andorra, United States
사이트 ACM
좋아요 수 0

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